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Pieter E. Sartain
I'm a hardware/software systems engineer from the UK, who graduated from the University of Kent in 2005 with a BEng (Hons) in Computer Systems Engineering. I was conferred an MSc by Research in 2009 for my work on a parallel optical debug link for Systems-on-Chip (SoC), and have worked on a variety of projects.
I currently live in Colchester, Essex, with my partner and a lot of computers.
I am not seeking work! However, if you have a project you think I can help with, don't hesitate to get in touch. My contact details are available here.
Resume
The following is only a partial resume. Please contact me directly should you require a formal resume.
Moog Insensys - Software Engineer
November 2009 - Present
UltraSoC Technologies - Software Engineer
January 2009 – July 2009
Tracking the bleeding edge of Eclipse and CDT (C/C++ Development Tooling) development, with a view to contributing and integrating new features both into UltraSoC's plugins and into CDT, I was responsible for the development of custom plugins for the demonstration of UltraSoC's UltraDebug silicon IP.
I provided the specification and framework implementation of a custom GDB server component in C, then ported and re-architected the component for multiple connections in C++.
All the while, I set up and supported the company SVN servers in Colchester and Cambridge.
University of Essex – Senior Research Officer (Embedded & Intelligent Systems Research Group)
May 2006 – December 2008
Under the ESPACENET project, I investigated novel system level debug solutions for satellite nodes, and extended this by proposing a generic framework for embedded systems. Written in C, with supporting simulation tools provided by MATLAB and Bash (Linux) scripts, I developed a framework and sample implementation of an AI-based system level debug solution.
Between working on the framework and writing papers, I integrated a Java VM with full networking support (foundation 1.0 profile) into an embedded Linux platform, running on a synthesised Leon3 processor inside an FPGA.
I wrote the coursework components of undergraduate and postgraduate Embedded Systems courses, and maintained that course for two years, as well as supervising both undergraduate and postgraduate students outside of lectures for laboratory sessions and projects, primarily using Cyan Technologies' eCOG1 processor.
To aid in generating formatted lists of references, I built a web-based reference database, called myRef, and helped maintain the groups design server (SuSE Linux).
University of Kent – Research Assistant (Embedded Systems Research Group)
May 2005 – May 2006
Working on a proof-of-concept debug interface project, using a parallel optical communications link (~24 Gbit/s), I was responsible for all budgetary & purchasing considerations, as well as the design and implementation of software, hardware and optics.
I designed, coordinated the assembly of, and tested two custom high-speed PCBs and a bare-die device chip-carrier-based optical transmitter package.
Publications
* P.E. Sartain, A.B.T. Hopkins, K.D. McDonald-Maier, “Optoelectronic Measurement Interface for System-on-Chip Debug”, Instrumentation and Measurement Technology Conference Proceedings (IMTC 2007), 1-3 May 2007, Warsaw, Poland.
* A.B.T. Hopkins, P. Sartain, K.D. McDonald-Maier, W.G.J. Howells, “Towards Embedded Artificial Intelligence Based Security for Computer Systems”, ECSIS Symposium on Bio-inspired Learning and Intelligent Systems for Security, 2008. (BLISS '08), 2008
*: P. Sartain, A.B.T. Hopkins, K.D. McDonald-Maier, W.G.J Howells, “A Framework for Self-Diagnosis and Condition Monitoring for Embedded Systems Using a SOM-Based Classifier”, NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2008), 22-25 June 2008, Noordwijk, The Netherlands.
*: P. Sartain, Andrew B. T. Hopkins, Klaus D. McDonald-Maier, W. Gareth J. Howells, “A System Level Framework for Monitoring and Self Diagnosis in ESPACENET”, NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007, 677-681